From de20dd656e3d91b3d495ca2ec19ee71bb1729458 Mon Sep 17 00:00:00 2001 From: Thomas Quinot Date: Sat, 21 Feb 2026 12:04:32 +0100 Subject: [PATCH] Initial commit --- .gitignore | 4 + doorbell.kicad_pcb | 7774 ++++++++++++++++++++++++++++++++++++++++++++ doorbell.kicad_prl | 130 + doorbell.kicad_pro | 653 ++++ doorbell.kicad_sch | 5456 +++++++++++++++++++++++++++++++ 5 files changed, 14017 insertions(+) create mode 100644 .gitignore create mode 100644 doorbell.kicad_pcb create mode 100644 doorbell.kicad_prl create mode 100644 doorbell.kicad_pro create mode 100644 doorbell.kicad_sch diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..cc72ba6 --- /dev/null +++ b/.gitignore @@ -0,0 +1,4 @@ +doorbell-backups +fp-info-cache +*.pdf +*.svg diff --git a/doorbell.kicad_pcb b/doorbell.kicad_pcb new file mode 100644 index 0000000..db7069c --- /dev/null +++ b/doorbell.kicad_pcb @@ -0,0 +1,7774 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 1.6) + (legacy_teardrops no) + ) + (paper "A4") + (title_block + (title "Door bell") + (date "2026-02-19") + (rev "1.0") + (company "Quinot Engineering") + ) + (layers + (0 "F.Cu" jumper) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 1.51) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_57555571) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + 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