From 0aeed8386a19a18b2e52aa068751e7c6236be3de Mon Sep 17 00:00:00 2001 From: Thomas Quinot Date: Sun, 22 Sep 2024 19:13:06 +0200 Subject: [PATCH] Notes about end of build --- _source/_posts/2024-05-01-cosmac.markdown | 41 +++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/_source/_posts/2024-05-01-cosmac.markdown b/_source/_posts/2024-05-01-cosmac.markdown index cd9a113..e73c526 100644 --- a/_source/_posts/2024-05-01-cosmac.markdown +++ b/_source/_posts/2024-05-01-cosmac.markdown @@ -36,3 +36,44 @@ Grain #500 sandpaper -> steel wool -> acetone Looking for a laminator... +Laminator (Pavo Vancouver A4) / parchment paper : utter failure, almost no transfer at all + +:check: **Great** result with stickers backing sheet + cloth iron (max temp) + lots of pressure +* press for 2 minutes without moving iron much +* shift weight to distribute pressure +* high pressure finish over details (iron side/tip) + +Reference: [Youtube](https://www.youtube.com/watch?v=haqP8xhsYas&t=600s) + +Fix broken traces with Lumicolor permanent marker + +:warning: Missed a broken trace + +## Etching + +Etchant solution: +* 50 mL 23% hydrochloric acid +* 50 mL 12% hydrogen peroxide + +Etches in a few minutes. **Reaction is exothermic.** +*Don't take it out too early.* The protection by toner and marker both work well. + +# Soldering + +Checking regularly for continuity, expected resistance values, and absence of shorts was key to success. + +# Debugging + +System worked on first try except for LOAD mode flip-flop. +The 4027 from AliExpress behaves in a weird way, as though J and K were reversed. + +The expectation is: +* ~DMA-IN is cabled to ~Q (i.e. the active low DMA IN signal is inactive when Q=0 ~Q=1) +* at startup Q=0 ~Q=1 +* upon a raising edge of CLOCK, the flip flop transitions to Q=1 / ~Q=0 / DMA IN is active +* upon a positive signal on RESET, the flip flop transitions to Q=0 / ~Q=1 / DMA IN is inactive + +According to both the truth table and the circuit design, this is the behaviour that should be observed with J=1 K=0. +In practice this is the behaviour observed with J=0 K=1. + +If I set J=1 K=0 and set Q=1 by presenting a positive signal on SET, then on a raising edge of CLOCK I see the flip flop going to Q=0 ~Q=1. \ No newline at end of file